STATCOM cascaded control loops

01

Live experiment

Educational example · phase RMS quantities · balanced three-phase system

K_p=13.64,\ T_i=17.37\,\mathrm{ms}

i*i

Ideal current reversal · first 2 ms

E(t)

DC energy envelope · 60 ms

Current-loop bandwidth2.5 kHzDC bus capacitance3 mF

Proportional gain: 13.64 V/A
Integration time: 17.37 ms
Transient energy: 40.71 J
DC voltage dip: 2.44 %

02

Model & equations

Pole-zero cancellation makes the ideal inner loop first order. The voltage trace uses a 1 ms energy extraction followed by a 15 Hz exponential recovery; it is an energy-envelope illustration, not a full switching simulation.

G_i(s)=\frac1{Ls+R},\quad C_i(s)=K_p\left(1+\frac1{T_i s}\right),\quad K_p=2\pi f_{loop}L,\quad T_i=\frac LR

\frac{i(s)}{i^*(s)}=\frac{\omega_{loop}}{s+\omega_{loop}},\quad \Delta W=Q_{comp}\Delta t

E_{dip}=\sqrt{E^2-\frac{2\Delta W}{C}},\quad \Delta E\%=100\left(1-\frac{E_{dip}}E\right)

03

Example parameters

Vg: 230 V RMS
f: 50 Hz
E: 750 V
Rcc: 0.05 Ω
Xcc: 0.1 Ω
R: 0.05 Ω
Rf: 0.6 Ω
P: 80 kW
cos φ: 0.74
fc: 10 kHz
L: 0.87 mH
Δt: 1 ms